Marginal monitoring device



Dec. 1, 1964 w. VAN DOORN 3,159772 MARGINAL MONITORING DEVICE Filed Maroh 22, 1961 |NVENTOR WILLEM VAN DOORN.

United States Patent O Willem van Doorn, Hilversum, Netiierlanrls, assignor to North American lliiiiips Company, nc., New orir,

N.Y. a corporation oi Delaware Filed Mar. 22, 19631, Ser. No. 97,520 Claims priority, application Nctlxerlanels lll 9 Claims. (C. 3l7-ltl-t5) The invention relates to a marginal monitoring device for marginally monitoring the level of a direct voltage comprising a switching voltage generator and a monitoring relay controlled "by the .switching voltage generator. The relay responds if the level of tlie direct voltage to be checked exceeds one of the two limit values of the marginal monitoring device.

=ln practice, sucl1 marginal monitoring devices are used in particular in carrier-wave telephony systems for monitoring the level of the pilot signal, it being required that the level of the pilot signal remains constant within two accurately fixed limit values. These limit values lie, for example, at a few db from the nominal level of the pilot signal. If -the level of the pilot signal exceeds these limit values, the monitoring relay should respond which in this event actuates, for example, an alarm device or etects an automatic change-over to a spare apparatus.

The invention has or its object to provide a construction of a device of the type mentioned which is particularly suitable for transistor equipment. The device, apart from a simple structure and great flexibility, is moreover distinguished favourably by its sensitive and reliable marginal monitoring operation.

The device according to the invention is characterizecl in that the switching voltage generator comprises two bistable trigger arrangements with relatively different response levels. The output circuit of the iirst bistable trigger arrangement is connected to a feedback circuit of the second bistable trigger arrangement. The monitoring relay is included in the output circuit of the lastmentioned trigger arrangement. The direct voltage to be checked is supplied in parallel arrangement to an input circuit of each of the two bistabie trigger arrange ments for the energization of the switching voltage for the monitoring relay.

The invention and its advantages will now be describ-ed more fully Witl1 reference to the figures.

FIG. 1 is a circuit diagram of a device according to the invention With transistor equipment; and

FIG. 2 is a level diagram for explaining the operation of the device slrown in FIG. 1.

The marginal monitoring device shown in FIG. 1 is arranged for the marginal monitoring of the levei of a pilot signal which, after being rectified in a rectifier stage not shown in the figure, is supplied Witli negative polarity to the input terminals 1, 2. In the emiaodiment shown, for example, tl1e upper limit of the marginal monitoring device lies at +2 db and tl1e lower limit lies at 3 db from the nominal level.

The marginal monitoring device is provided with a switching voltage generator 3 and a monitoring relay 4. The relay responds when the level of the rectified pilot signal exceeds tlie upper limit or the lower limit and consequently actuates an alarming device 6 shown in a block diagram in the figure through a break contact 5.

In order to obtain a sensitive and reliable operation of the marginal monitoring device, tlie switching voltage generator 3 comprises two bistable trigger arrangements '7, 8 having relatively diierent response levels. The output circuit of the first bistable trigger arrangement 7 is connected to a feedback circuit of the second bistable trigger arrangement, and the monitoring relay 4 is inlatenteel Den. 1, 1954 cluded in tl1e output circuit of the lastmentioned trigger arrangement. The direct voltage occurring at the input terminals 1, 2 is supplied in parallel to the input circuit of each of the bistable trigger arrangements 7, 8 for producing the switching voltage for the monitoring relay 4.

The bistable trigger arrangements 7 and 8 comprise transistors 9, itl and 11, 12) respectiveiy. The input electrodes of the trigger arrangements 7, 8 are the base electrode of tlie transistors 9 and 11, respectively, which are connected to the input terminal 1. The collector electrodes of transistors 9 and 11, are connected through resistors 13 and 14, respectively, to the negative terminal 15 of a stabilizecl supply voltage source. The as sociated transistors 9, 10 and 11, 12, respectively, are coupled crosswise, with the collector electrodes of the transistors 9 and 11 laeing separately coupled to the base electrodes of the transistors il and 12, respectively, through voltage dividers 16, 17 and 8, 19, respectively. The erntter electrodes of these transistors 10 and 12, are connected to the junction of two series resistors 2G, 21 and 22, 23, respectively, in the emitter circuit of the transistors 9 and 11, respectively.

In the bistable trigger arrangement 8, tl1e monitoring relay 4 is included in the output circuit comprising the collector circuit of the transistor 12. In this bistable trigger arrangement 8, besides the relative coupling of the two transistors 11 and 12, respectively, tl1e output voltage of the bistable trigger arrangement 7 has also been made etlective, which voltage for this purpose is supplied to the feedback circuit going from the transistor 11 to the transistor 12 and comprising the voltage divider 18, 19.

If no input voltage is supplied to the input terminals 1, 2 of the arrangement so far described, the transistor 9 of tlie bistable trigger arrangement 7 will be blocked and its transistor 1i) will =be conductive. A relatively high negative voltage occurs at the base of the transistor 1tl through the voltage divider which lies between the ne"ative supply voltage terminal 15 and earth and which is constituted by the resistors 13, 16, 17. A volt age drop appears across resistor 21 in lle emitter cir cuit of transistors 9 and 1% due to current flow in transistor 1t. This voltage drop constitutes a blocking voltage for the transistor 9. Under this condition, the transistor 11 of the trigger arrangement 8 is also blocked, but owing to the voltage drop across resistor 14 caused by the conduction of transistor 10, the base voltage of the transistor 12 is partici1larly lovv, so that also a low collector current lows through the monitoring relay 4. This current is not sufficient te cause the relay to respond. in order to obtain sensiti"e and reliable marginal monitoring, under tliis condition it is favourable to bloei: tl1e transistor 12 completely. This is efiected in a simple marmer by connecting the emitter electrode to a voltage divider having resistors 24, 25 and connected between the negative supply voltage circuit 15 and the junction of the emitter resistors 22, 23. Consequently, if an input voltage of the terminals 1, 2 is absent, the transistors i, M, 12, will be blocked and the transistor tl will be conductive, and the monitoring relay 4 is deenergized.

if, starting front tnis condition, the input voltage at the input terminals 1, 2 is raised in a negative sense, at the moment when tl1is input voltage exceeds tl1e voltage across the emitter resistor 21 of the transistor 1%, the transistor 9 will draw collector current' and consequently a voltage drop will occur across the resistor 13. Tiis voltage drop is transferred to the base electrode of the transistor ii by tl1e voltage divider 16, 17. The resulting decrease of the emitter current in the transistor 16) causes a decrease in the reverse voltage of the transistor 9 across the emitter resistor 21, and tlris decrease in reverse voltage contributes to the conduction of the transistor 9. The described cumulative effect causes, as is known per se, a sudden blocking of the transistor and a release of the transistor 9.

At the same time the transistor 161 is blocked, the voltage at the base electrode of: the transistor 12 increases, since there fiows no longer any collector current of the transistor 1tl across the resistor 14. Ths results in the transistor 12 becoming conductive, and the monitoring relay 4 is therefore energized. In order to insure that the collector current flowing through the relay 4 is always adjusted to its most favourable value, and that influences resulting trom ageing phenomena, temperature variations and the like are considerably reduced, the base of the transistor 12 in the conductive state is connected to a fixed voltage. This is acheved by means of a 10W- ohmic voltage divider 26, 27 connected between the negative supply voltage terminal and ground. Ths voltage divider is connected to the base electrode of the transistor 12 by a diode 28 having a current-pass direction as indicated in the figure. The diode 28 is tl1en conductive since the base electrode of the transistor 12 is directly connected to the voltage divider 26, 27, so that the base voltage of the transistor 12 is exclusively determined by the divisional ratio of the low-ohmic voltage divider 26, '27.

At this value of the voltage occurring at the input terminals 1, 2, the transistors 10, 11 are blocked and the transistors 9, 12 are conductive, and the monitoring relay 4 is energized.

If the voltage at the input terminals 1, 2 is further increased in a negative sense, this increase in the input voltage no longer influences the trigger arrangement 7. If this voltage exceeds the voltage occurring across the emitter resistor 23 of the transistor 11, a change-over of the trigger arrangement 8 will take place, in which case the transistor 11 becomes conductive and the train sistor 12 is blocked, which results in the relay becoming de-energized. Moreover, the result of the produced decrease in base voltage of the transistor 12 is that the diode 28 is blocked and hence the voltage divider 26, 27 is switched of from the base electrode of the transistor 12.

In this manner, the marginal monitoring of the input level is obtained by means of the switching voltage generator wl1ich provides that, if one of the limit values determined by the response levels of the two trigger arrangements 7, 8 is exceeded, the monitoring relay 4 is certain to respond, which, as set 011t above, results in an actuation of the alarm device 6 through the break contact 5. Apart from a reliable and accurate marginal monitoring operation, the arrangement described is moreover not very sensitive to the ageing phenomena, tem perature variations and the like.

T he marginal monitoring will now be further explained with reference to the level diagram shown in FIG. 2. In this diagram, the full line (1 represents the nominal level of the pilot signal Which lies between the limit values of the marginal monitoring device determined by the response levels of the two trigger arrangements 7, 8. At this value of the input level, as has been already explained above, the transistors 9, 12 are conductive and the transistors 11), 11 are blocked, and the monitoring relay 5 is energized.

If the voltage at the input terminals 1, 2 of the marginal monitoring device exceeds the voltage across the emitter resistor 23 of the transistor 11, wl1ich voltage is indicated in the figure by the full line b, the trigger arrangement 3, as already explained above, changes over, as a result of which the transistor 11 becomes condnctive and the transistor 12 is blocked, and the relay 4 is de-energized. By adjusting the emitter resistor 23, the de-energizing level of the relay 4 can be adjusted at a desired valne.

If the voltage at the input terminals 1, 2 is changed again in the direction of the nominal level a, the trigger arrangement 8 will change over to its original operating condition only at a voltage which is a few tenths of a db lower, for example 0.3 db, which voltage is indicated in the figure by the broken line 0, in this marmer; between the energizing voltage and the de-energizing voltage of the relay a hysteresis is introduced which can be adjusted in a simple manner by means of the emitter resistor 22. Ths introduction of tliis hysteresis is advantageous for the practical apparatus in order to prevent an intermittent alarm, since at substantially equal values of the energizing and de-energizing voltage, inevtable small variations of the pilot signal in the proximity of these voltage values wiil cause an alternate energization and de-energization of the monitoring relay 4.

In a completely analogous manner, at the lower limit of the marginal monitoring device, a hysteresis of, for example, 0.4 db is introduced between the de-energizing voltage and the energizing voltage of the monitoring relay 4, which voltages may again be adjusted in a simple marmer by means of the emitter resistors 20 and 21, respectively. In the figure, the de-energizing voltage is indicated by the full line d, the energizing voltage being indicated by the breken line e.

in accordance with the use, in the marginal monitoring device described, the limit values and the hysteresis may be adjusted in a simple manner. As a result the marginal monitoring device can be adapted to the monitoring requirements for the use concerned in a simple manner. The adjustment may then be brought about in ditlerent ways, for exampie by means of a continuous adjustment or a stepwise adjustrnent. If desired, both the limit values and the hysteresis may be varied at the same time, this may be achieved, for example, in a simple manner by shunting the two emitter resistors 20, 21 and 22, 23, respectively, in the emitter circuit of the transistors 9, 11 by a suitable variable resistor.

It should be noted that, when varying the resistor 23 in the emitter circuit of the transistor 12, it is advantageons te vary the resistor 24 at the same time in opposite sense, since then in adjusting the resistor 23, the total emitter resistance of the transistor 12 remains constant and tlius, drie is also the case with the collector current flowing through the monitoring relay 4. This may be achieved in -a simple manner by utilizing for these two resistors 23, 24 a voltage divider the variable tapping point of which is connected to the resistor 22 in the emitter circuit of the transistor 11.

In conclusion, as explained in detail in the foregoing, by carrying out the steps in accordance with the invention, apart from a simple construction, a reliable marginal monitoring device is obtained wl1ich, owing to its accurate marginal monitoring operation and its great flexibility, is particularly attractive for practical uses.

The following data of a device of the type mentioned, elaborately tested in practice, are stated below.

Transistors 9, M, 11, 112 CC 45 Resistor 13 13KS2 Register 2tl 0.42KS2 Resistor 21 0.24K9 Resistor 16 6.2K9 Resistor 17 2.2KS2 Resistor 14 3KQ Resistor 22 0.18K9 Resistor 23 0.077K52 Resistor18 3.6K9 Resistor 19 2.7Kt2 Resistor 24 0.113KS2 Resistor 25 3.3Kt2 Resistor 26 2Ktl Resistor 27 0.56K52 Diode 28 0A Finally, it should be noted that instead of using in the marginal monitoring device the trigger arrangements of the type Schmitt shown in FIG. I, use may also be made of other constructions of trigger arrangements. It has appeared, however, that the construction shown in FIG.

1 in technical respect is particularly attractive for practical uses.

What is claimed is:

1. A circuit responsive to the level of a direct voltage within the range between a predeterrnined first level and a predeterrnined second level of greater absolute magnitude than said first level, said circuit comprising a source of said direct voltage, first and second bistable trigger circuits, each of said trigger circuits having an input circuit, an output circuit, and having first and second stable conduction states in the respective output circuits dependent upon the voltage applied to the respective input circuit, each of said bistable trigger circuits having a feedback circuit whereby only said first and second stable conduction states can occur in the respective output circuits, said first and second trigger circuits being responsive to change conduction states at said first and second levels respectively, means applying said direct voltage to the input circuits of said first and second trigger circuits, means connecting the output circuit of said first trigger circuit to the feed back circuit of said second trigger circuit whereby a change of conduction state of said first trigger circuit produces a change in the conduction state of said second trigger circuit, and output circuit rneans connected to the output circuit of said second trigger circuit 2. A circuit responsive to the level of a direct voltage within the range between a predeterrnined first level and a predeterrnined second level oi greater absolute rnagntude tnan said first level, said circuit comprising a source of said direct voltage, first and second bistable trigger circuits, each of said trigger circuits comprising first and second amplifier devices, a feedback circuit connected between said first aud second devices tor blocking conduction of the first device when the respective second device is conducting and for blocking conduction of the second device When the respective first device is conducting, means applying said direct voltage to the first devices of said first and second trigger circuits Whereby said first and second trigger circuits are responsive to voltages of said first anti second levels respectively to change the state of conduction of the first and second devices of the respective trigger circuit, means connecting the second device of said first trigger circuit to the feedback circuit of said second trigger circuit Whereby a change of conduction state in the first and second devices of said first trigger circuit produces a change of state of the first aud second devices of said second trigger circuit, and output circuit means connected to said second device of said second trigger circuit.

3. A circuit responsive to the level of a direct voltage Witliin the range between a predetermined first level and a predeterrnined second level of greater absoiute magnitude than said first level, said circuit comprising a source of said direct voltage, monitor relay means having an operat ing coil and contact rneans, first and second bistable trigger circuits, each of said trigger circuits comprising first and second transistors, With the collector of the respective first transistor being coupled to the base of the respective second transistor, and the emitter of the respective second transistor being coupled to the emitter of the respective first transistor Whereby current low in ons of said transistors of each of said trigger circuits will bloclc current flow in the other of said transistors of the respective trigger circuit, means agplying said direct voltage to the base electrodes of the first transistors of each of said transistor circuits whereby the conductive state of said first transistor of said first and second trigger circuits is ci1anged at said first and second levels respectively, first anti second output circuit means connected to the collectors of the second transistors of said first and second trigger circuits respectvely, rneans connecting said first output circuit to said coupling rneans between the collector of the first transistor and the base of the second transistor of said second trigger circuit, whereby a change of: conduction state of the second transistor of said first circuit produces a change of state of conduction of the second transistor of said second trigger circuit, 1neans connecting said coil to said second output circuit, and utilization means conneoted to said contact rneans.

4. Tle circuit of claim 3, cornprising a source of operating voitage having first and second terminals, Wherein each of said first and second trigger circuits comprise first resistor means connected between said first termina and the collector of said first transistor, second resistor rneans connected between the collector of said first tran sister and the base of said second transistor, liird resistor rneans connected cetween the base of said second transistor and said second terminal, ourth and ifth resistor 1neans serially connected between the emitter of said first transistor and said second terminal, anti means connecting tire unction of said iourth and fiith resistor means to the entitter of said second transistor.

5. The circuit of claim 3, wherein said n1eans connectiii-g said first output circuit means to said coupling rneans comprises means connecting the collector of the second transistor of said first trigger circuit to the collector of the first transistor of said second trigger circuit.

6. Tlre circuit of claim 4, comprising sixth resistor rneans connectecl between the emitter of the second transistor of said second trigger circuit and said second trigger circuit, and said means connecting the emitter of the second transistor of said second trigger circuit to said junction comprise s seventh resistor rneans.

7. Tie circuit of claim 4, cornprising resistive voltage divider rne-ans connectecl between said first and second terminals, said voitage divider means having a tap, and diode n1eans connected between said tap and the base of the second transistor of said second trigger circuit, said diode rneans beiug polarized to conduct when said second transistor of said second trigger circuit is conductive.

8. A circuit responsiVe to the level of a direct voltage witlrin the range between a predetermined first level and a predeterrnined second level of greater absolute magnitude tiran said first level, said circuit comprising a source of said direct voltage, first and second bistable trigger cir cuits each having an input circuit and an output circuit, means applying said direct voltage to botl1 of said input circuits, said first trigger circuit having a first conduction staole state in its output circuit when said direct voitage is below said first level and a second stable conduction state in its output circuit when said direct voltage is above said first level, said second trigger circuit having a third stable conduction state in its output circuit when said direct voltage is below said second level and a fourth stable conduction state in its output circuit When said direct volta"e is above said second level, said first and second bistable trigger circuits each having a positive feedback circuit vvhereby the conduction states in said output circuits must he said stable states, rneaus connecting the output circuit of said first trigger circuit to the feedback circuit of said second trigger circuit or holding said second trigger circuit in said fourth stable state wlien said first trigger circuit is in said first stable state, vvnereby said second trigger circuit is in said tliird stable state only when said direct voltage is below said first level and above said second level, and output circuit means connected to the output circuit of said second trigger circuit.

9. A circuit responsive to the ievel of a direct voltage within the range between a predeterrnined first level and a predetermined second level of greater absolute magnitude than said first level, said circuit comprising a source of said direct voltage, first and second bistable circuits each having first and second amplifying devices and an input circuit and an output circuit, said first and second arnplifiers being interconnected in each of said bistable circuits whereby a first conduction state of the second aniplifier device holds the respective first amplifier device in a second conduction state unless the voltage in the respective input circuit exceeds a thresl1old level, the threshold levels of said first and second bistable circuits being said a first and second levels respectively, thc output circuit of said first bistable circuit being connectcd t0 said sccond bistable circuit to held thc second amplifying device of said second bistable circuit in said sccond conduction state until said direct voltage exceeds said rst level, and output circuit means connccted to the output circuit of sad second bistable circuit.

Eeterences icfl in the file 0f this patent UNTED STATES PATENTS Hetzler July 12, 1960 Cook et al. Dec. 20, 1960 Cole et al. Nov. 14, 1961 Ross June 26, 1962 

1. A CIRCUIT RESPONSIVE TO THE LEVEL OF A DIRECT VOLTAGE WITHIN THE RANGE BETWEEN A PREDETERMINED FIRST LEVEL AND A PREDETERMINED SECOND LEVEL OF GREATER ABSOLUTE MAGNITUDE THAN SAID FIRST LEVEL, SAID CIRCUIT COMPRISING A SOURCE OF SAID DIRECT VOLTAGE, FIRST AND SECOND BISTABLE TRIGGER CIRCUITS, EACH OF SAID TRIGGER CIRCUITS HAVING AN INPUT CIRCUIT, AN OUTPUT CIRCUIT, AND HAVING FIRST AND SECOND STABLE CONDUCTION STATES IN THE RESPECTIVE OUTPUT CIRCUITS DEPENDENT UPON THE VOLTAGE APPLIED TO THE RESPECTIVE INPUT CIRCUIT, EACH OF SAID BISTABLE TRIGGER CIRCUITS HAVING A FEEDBACK CIRCUIT WHEREBY ONLY SAID FIRST AND SECOND STABLE CONDUCTION STATES CAN OCCUR IN THE RESPECTIVE OUTPUT CIRCUITS, SAID FIRST AND SECOND TRIGGER CIRCUITS BEING RESPONSIVE TO CHANGE CONDUCTION STATES AT SAID FIRST ANDSECOND LEVELS RESPECTIVELY, MEANS APPLYING SAID DIRECT VOLTAGE TO THE INPUT CIRCUITS OF SAID FIRST AND SECOND TRIGGER CIRCUITS, MEANS CONNECTING THE OUTPUT CIRCUIT OF SAID FIRST TRIGGER CIRCUIT TO THE FEEDBACK CIRCUIT OF SAID SECOND TRIGGER CIRCUIT WHEREBY A CHANGE OF CONDUCTION STATE OF SAID FIRST TRIGGER CIRCUIT PRODUCES A CHANGE IN THE CONDUCTION STATE OF SAID SECOND TRIGGER CIRCUIT, AND OUTPUT CIRCUIT MEANS CONNECTED TO THE OUTPUT CIRCUIT OF SAID SECOND TRIGGER CIRCUIT. 